Field of the Invention
The present invention relates to emulating a legacy bus operation over a bit-serial bus, and more particularly relates to emulating an x86 legacy bus I/O space over a Serial Peripheral Interface (SPI) bus.
Description of the Related Art
The instruction set of some processors includes separate I/O instructions that reference a separate I/O address space different from memory address space. Such instructions, such as the x86 ‘IN’ and ‘OUT’ instructions, were originally conveyed over system busses that provided for such a separate I/O address space, such as the ISA bus. On more recent systems, such legacy busses have been supplanted by newer, faster, and more efficient busses, such as the Low Pin-Count (LPC) bus, which also includes a separate I/O address space.
Traditionally, I/O transactions using the ‘IN’ and ‘OUT’ instructions can only exist on busses that support an I/O address space. For legacy PC devices, those transactions must go over the LPC bus. However, the LPC interface is antiquated and not always appropriate for today's low power platforms.
Currently in the PC industry, the LPC bus is used to connect to specific microcontrollers, for example an ACPI-defined Embedded Controller (EC) or Super I/O (SIO) device. Today, ECs and SIOs implement many of the legacy I/O devices such as a Keyboard Controller, or a Floppy Disk Controller. The LPC bus, however, is specific to the legacy device space and so requires microcontrollers that are designed for that specific task. These microcontrollers tend to have very specific I/O devices and there is not much differentiation among EC or SIO vendor offerings.
For mobile, tablet, and other low-power or space-constrained devices, it is attractive to connect a generic microcontroller with the desired I/O devices to the Host Processor (such as a CPU and/or accelerated processing unit (APU)) via an SPI bus rather than an LPC bus. In addition to the legacy I/O functions required by an EC or SIO, modern systems frequently need co-processing on items such as position sensors (GPS, accelerometers, etc). However, a problem arises because the SPI bus specification has no method to distinguish an I/O access from a memory access. This makes replacing a traditional EC or SIO with a generic microcontroller difficult if the platform designer wants to keep the existing ACPI-defined software interface valid. From a Basic Input/Output System (BIOS) and Operating System (OS) perspective, it is quite valuable to maintain the same software interface across multiple products.